66: R200-B5

64: R200-B7

65: R200-B11

69: R200-B15

72: R200-B5L

73: R200-B7L

66: R200-B5

64: R200-B7

65: R200-B11

69: R200-B15

72: R200-B5L

73: R200-B7L

65534: Unknown (unable to identify the base)

One of the following:

0 = No module detected

1 = Active

2 = Wrong module. The Module Type does not match the Module Type (Defined).

3 = Unsupported module.

Bits 23-16: Major revision

Bits 15-8: Minor revision

Bits 7-0: Mod level (0=A, 1=B, …)

Bits 23-16: Major revision

Bits 15-8: Minor revision

Bit 7: 1=Beta, 0=Standard

Bits 6-0: Config ID (1=A, 2=B, ...)

96: R200-PS4D

97: R200-PS6D

98: CPU20L integrated power supply

 

96: R200-PS4D

97: R200-PS6D

98: CPU20L integrated power supply

65534: Unknown (unable to identify)

0: No module detected. This will be reported if the module does not respond to communication. The power supply itself is active (or the CPU would not be running) but we have no information from the module.

 

1: Active. This will be reported when the module was enumerated and is supported and providing us with real-time information.

 

2: Wrong module. This will be reported when the module was enumerated, but the Module Type does not match the Module Type (Defined) value.

 

3: Unsupported module. This will be reported when the module was enumerated, and the Module Type matches the Module Type (Defined) value, but the revision of the module is not supported.

Bits 23-16: Major revision

Bits 15-8: Minor revision

Bits 7-0: Mod level (0=A, 1=B, etc.)

Bits 23-16: Major revision

Bits 15-8: Minor revision

Bit 7:  1=Beta, 0=Standard

Bits 6-0: Config ID (1=A, 2=B, ...)

Bits 23-16: Major revision

Bits 15-8: Minor revision

Bit 7:  1=Beta, 0=Standard

Bits 6-0: Config ID (1=A, 2=B, ...)

0: R200-CPU40

2: R200-CPU20L

0: R200-CPU40

2: R200-CPU20L

1: Active.

The CPU will always report the Active state. The CPU can only be loaded with firmware that supports that particular model.

Bits 23-16: Major revision

Bits 15-8: Minor revision

Bits 7-0: Mod level (0=A, 1=B, etc.)

Bits 23-16: Major revision

Bits 15-8: Minor revision

Bit 7:  1=Beta, 0=Standard

Bits 6-0: Config ID (1=A, 2=B, ...)

Bits 31-24: Major revision

Bits 23-16: Minor revision

Bits 15-8: Patch revision

Bit 7-0: Config ID (1=A, 2=B, ...)

0: Standard

1: Experimental (EXP)

2-127: Special Release (S2-S127)

128: Beta Standard

129: Beta Experimental (EXP)

130-255: Beta Special Release (S2-S127)

 

Bits 23-16: Major revision

Bits 15-8: Minor revision

Bit 7:  1=Beta, 0=Standard

Bits 6-0: Config ID (1=A, 2=B, ...)

Bits 23-16: Major revision

Bits 15-8: Minor revision

Bit 7:  1=Beta, 0=Standard

Bits 6-0: Config ID (1=A, 2=B, ...)

132: R200-A8

136: R200-CA4

140: R200-S8

144: R200-Q4

148: R200-D24

152: R200-CV8

156: R200-U14

160: R200-LC8

65535: Empty

132: R200-A8

136: R200-CA4

140: R200-S8

144: R200-Q4

148: R200-D24

152: R200-CV8

156: R200-U14

160: R200-LC8

65535: Empty

One of the following:

0 = No module detected

1 = Active

2 = Wrong module. The Module Type does not match the Module Type (Defined).

3 = Unsupported module.

4 = Ignored module. The module was detected, but the Module Type (Defined) is Empty (65535).

5 = Module Updating. When a module is taken offline in order to update its firmware or soft ID.

Bits 23-16: Major revision

Bits 15-8: Minor revision

Bits 7-0: Mod level (0=A, 1=B, etc.)

Bits 23-16: Major revision

Bits 15-8: Minor revision

Bit 7:  1=Beta, 0=Standard

Bits 6-0: Config ID (1=A, 2=B, ...)

 Supported by the CA4, CV8, A8, U14, and LC8 modules.

This register selects the configuration mode for this module. This register only applies to the S8, U14, and D24 modules.

 

R200-S8 Module:

This register selects the operating mode for channels 6 and 7. The following options are available:

• Two SSI/MDT inputs (0). Channels 6 and 7 are standard SSI/MDT inputs.

• One Quadrature input (1). Channels 6 and 7 are defined as a single A/B quadrature input with no hardware homing or registration.

• One SSI Monitor input (2). Channels 6 and 7 are defined as a single SSI monitor input.

See Configuring S8 Channels for details.

 

R200-U14 Module:

This register selects the operating mode for the U14 high-speed channels.

Bits 0-7: Channel 0

Value	Mode
0	SSI/MDT
1	Quadrature input
2	SSI Monitor

 

Bits 8-15: Channel 1

Value	Mode
0	SSI/MDT
1	Quadrature input
2	SSI Monitor
3	SSI Echo

 

See U14 Module (RMC200) for details.

 

R200-D24 Module:

This register selects the operating mode for the D24 high-speed inputs (20-23). The following options are available:

• No quadrature inputs (0). The inputs are used as general-purpose inputs.

• One quadrature input (A, B, Z). Inputs 20-22 are used as A, B, and Z encoder inputs. Input 23 can be used as a general-purpose input.

• One quadrature input (A, A, B, B) with wire-break detection. Inputs 20-23 are used as A, B, A, and B encoder inputs.

• Two quadrature inputs (A, B). Inputs 20-21 are A and B for one encoder and inputs 22-23 are A and B for a second encoder.

See D24 Module (RMC200) for details.

 

R200-LC8 Module:

This register selects the minimum filter frequency for the module-wide hardware filter in the LC8 module:

• 0 = 150 Hz (default)
  2000 µs ADC conversion time

• 1 = 300 Hz
  1000 µs ADC conversion time

• 2 = 600 Hz
  500 µs ADC conversion time

• 3 = 1200 Hz
  250 µs ADC conversion time

• 4 = 2400 Hz
  125 µs ADC conversion time

If a filter is selected whose ADC conversion time exceeds the motion loop time, then the firmware will automatically increase the filter frequency. For example, if 150 Hz is selected on a controller with a 500 µs loop time, then the firmware will force the LC8 module to use the 600 Hz filter frequency.

See Configuring the LC8 Module for details.

Holds the number of Event Timers provided by this module. This will be four (4) for the D24 module and zero (0) for all other modules. See Event Timers for details.

Holds the status of Event Timer 0 in this module:

Bit 0: Event Timer Armed. This bit is set when this Event Timer is armed.

Bit 1: Event Timer Latched. This bit will be set when the Event Timer has latched a time for the event.

Bits 2-31: Reserved.

This register only applies to modules that support event timers. See Event Timers for details.

The seconds portion of the latched timestamp. See Event Timers for details.

The nanoseconds portion of the latched timestamp. See Event Timers for details.